Many of the new agentic electronic design tools are KiCad-based, which is fine, but for people creating new EDA tools I'd encourage them to take a look at tscircuit (open-source, MIT). KiCad wasn't built for AI-gen with things like automatic routing/placement, supplier footprint orientation checking, connector orientation checking and other features that will be required as more people expect extensive validation for AI-generated designs. KiCad could add these things, but they've got decades of baggage and many Altium features to pull in. I'm worried that we're all getting bound by KiCad s-exprs
While this new competency of LLMs in EDA is objectively neat, I can't help but feel a little sad about the way this is going. Electronics projects are my refuge from the new hyper-speed low-quality software world. I want to "just not use it" and continue to enjoy electronics, but if I ever want to turn one of my ideas into a product, I'll be up against people who are building extremely quickly and to a lower quality standard. Yes, potential users of a cool new gadget care about having their problems solved above all else, but I can tell this is going to turn into another field we're all here saying "what happened to craft?" about, and idk, I just don't like it. And this is coming from someone who enjoys (turn by turn) LLM-boosted programming.
Flux.ai being the incumbent
Silixon based out of the UK have been showing demos
Quilter and DeepPCB for layout
The recent OpenAI demo...
I went the other way and pre-designed sub circuits with a set of rules that allows simple merge assembly, unfortunately I didn't have the time or budget to continue with it, but I took the constrained approach as with hardware, things can't be 99%.
The one thing I will say, is that my experience of hardware engineers is very gatekeepy.
Any questions about the use of AI for any form of automation on forums/Reddit get shot down instantly and the OP's told 'skill issue' more or less. In my opinion, just as with software, most work is simple and should be automated, there will always be a need for the real engineering when it comes to high specification work, high volume optimisation and hardware debug (although Claude code is pretty handy at driving a Jlink)
> The one thing I will say, is that my experience of hardware engineers is very gatekeepy.
Stay away from Reddit and forums if you want to see where the open minded people are looking. There are a lot of communities where EEs are experimenting with newer technologies and sharing their results, with realistic appraisals of what can be done.
You also need to understand the history of autorouting technology for PCBs. Autorouters with auto layout have been around in many forms for years. Their output never compares to a skilled EE doing it manually. The gap between autorouter output and skilled operator output is even bigger than the gap between a good developer and average AI codegen slop.
I’m interested in this space, but even the Fable/Astra or dedicated tools like Quilter, Flux, and others have a very, very long way to go for boards more complex than simple hobby boards.
I do think this is going to be good for hobby people doing simple PCBs though
If anything, it's closer to the bin packing problem. The cost function isn't expressed in terms of lowest cost between nodes, but instead fitting all of the traces with the lowest board layer count while still meeting stuff like EMI crosstalk guidelines. Then there'll be some traces that are very constrained (think DRAM or SERDES links) that have to be length matched, but those are pretty much invariably point to point links that already are heavily automated.
Traces being, say 20% longer than they need to be for an optimal solution doesn't really change the performance of the board in the vast majority of cases since they'll be some of the lowest resistance components of the netlist anyway, as well as the fact that the PCB is normally oversized for the number of traces needed as it fulfills structural/mechanical needs as well as the netlist needs.
And on top of that, because the optimal solution probably is NP-hard, once again, the industry doesn't look for optimal, only good enough. If layout techs in Altium were regularly solving NP-hard problems, computer science would be a different place. The only goal I see is to meet that bar without hiring layout techs.
>Traces being, say 20% longer than they need to be doesn't really change the performance of the board
Impedance matching requires you know what you are doing, and Altium will only take you so far. For the price, Altium/Protel has always been a poor deal for what you get software wise.
Even free Qspice (a more modern Analog Devices LTSpice) is a far better option:
> Impedance matching requires you know what you are doing, and Altium will only take you so far. For the price, Altium/Protel has always been a poor deal for what you get software wise.
Pretty much every high end board is designed under Altium. QSpice is a different tool for a different purpose.
And like I said, those few cases were the length actually matters tend to be heavily assisted with automation as it is.
> Indeed, that is why your iPhone still weighs 3.7 kg. =3
I guarantee you that an iPhone board isn't an optimal solution, simply good enough.
>I guarantee you that an iPhone board isn't an optimal solution,
DFM almost certainly guarantees an iPhone is both form, and cost optimized. Jobs was very clear early on in the product development that the EE work had to be miniaturized due to the energy density possible setting volumetric minimums on the battery technology at that time.
> simply good enough.
A common philosophy for people that make cost optimized low-end products. Some people love their 3.7kg phone, as it comes with a stylish shoulder strap. =3
Magic smoke is important, as it indicates a design parameter was exceeded.
I often recommend folks get a mini thermal camera for their phone... as inspecting for issues in electrical, hydraulic, or mechanical systems gets a fair bit easier/safer. =3
Only decades of standards compliance, workmanship training, and experience. Human beings are very good at spotting patterns in noisy jungles, and making rational design tradeoffs.
Auto-routers have been around far longer than even smartphones. Somewhat functional in the trivial problem domains, and always useless where design choices mattered.
Computationally what’s the difference between a human and an LLM besides scale and speed? Trained humans are still using heuristics and shortcuts. Just because these are subconscious and only possessed by talented, trained professionals doesn’t make the skill computationally special.
LLM do not think because they are not real "AI", but it does copy the linear patterns people exhibit if statistically salient within the granularity of the higher dimensional vector search space proximity. Watermarking does skew the compaction slightly, but not far from resulting output patterns. =3
I do think that slightly smarter LLMs and a good (although not perfect) autorouting algorithm could solve 99% of hobbyist's projects and simple industry boards, due to the repetition of those patterns in real life.
The LLM would learn the heiristics (example: data lines first, power lines later, etc.) and would request the autorouter to do that routing, then take the image output and request a different part (depth-first). If later no routing is posible with that configuration, after some retries it could try another way.
It wouldn't solve complex boards, and engineers are always needed for short comings (and even if not, for research), but I wouldn't say this is something different than poetry, music or pixel art, LLMs can imitate although most of the times in a uncanny way.
> Somewhat functional in the trivial problem domains, and always useless where design choices mattered.
This is laughable when you consider that semiconductor design is the least "trivial" problem domain, and it happens entirely in RTL. There's basically zero human intervention when it comes to layout: even floorplanning is being automated nowadays.
We can find local optima, but there's no real way to prove a given design is the best of all possible designs. We can only find designs which work and meet the given criteria.
One can prove that a design is correct, but it requires the same class of compute as an LLM to properly simulate. Circuit boards are hellishly complicated once you start simulating EM and RF responses.
As for how a good engineer does this, it's the same way pilots can fly helicopters: intuition. It's a skill built up from lots of reading the rules and theory, and lots of practice. One gets a feel for how the various fields and energies are moving.
Which, when you think about it, is just about how neural nets learn, isn't that neat?
I think the real answer here is that machine learning is absolutely capable of producing satisfactorily correct circuit boards. In principle. But I think the problem space is far too large for today's ML techniques and verification/iteration is just way too expensive. Maybe in another few years, I just don't think we have enough compute for it yet.
> Stay away from Reddit and forums if you want to see where the open minded people are looking. There are a lot of communities where EEs are experimenting with newer technologies and sharing their results, with realistic appraisals of what can be done.
My experience with hardware engineers, at least IRL, is very different. They love to talk about their work. However, I used to be an EE so that probably helps.
As for Reddit, there's a lot of "bury head in sand and problem will go away" behavior when it comes to AI. People are understandably worried about their jobs, but they're certainly not doing themselves any favors by downplaying AI or looking for "tech niches where AI isn't yet."
Copperhead is very interesting. I do some embedded systems consulting on the side, but I've never enjoyed PCB layout very much. I briefly investigated using AI for it the last time I had to do a board, but it wasn't very helpful.
I do not have experience with Copperhead, but I made 2 PCBs with Claude. He made a py script that generates Kicad sources, I ended up generating all files (in particular schematics and PCB) from a shared netlist, and use Kicad cli to validate and generate gerbers.
I manufactured both PCBs via PCBWay (Claude also red all the specs and configured the constraints accordingly) and both work. I'm pretty impressed, especially because I've never done a PCB myself and didn't know I could.
What I was doing manually, co-working with Claude, was placing and routing (I was doing those via Kicad, then saving, then Claude was re-importing my work in his py files).
I recommend having the LLM write Skidl, which generates a netlist, which you import in the PCB editor, which the LLM then reviews. Routing itself I think would require code-driven routing (expressing board via layout constraints, kinda like UI constraints/CSS) which does not exist yet.
Just regular coding agents are really good with Skidl schematics and can review layouts well. I'm not sure why you'd want a specialised environment for this.
They have similar names, seem to solve similar problems and both have first commit within a few days in July. One is Python and the other Typescript though and they don't seem to be forks.
This is probably not the primary way people use the tool, but if I log in (desktop, Chrome on macOS), click "Start a board" on the sidebar, and go to click any of the inputs, I can't type text in them (the inputs are "Start from an example", "What are you building", and "The brief".
If you scroll down they want you to "Connect copperhead to GitHub first." The bottom should have a page where you can give them access to a repo for handling stuff.
Why would somebody ever use a hosted version? I see
"One-click gerber, DXF/STEP, render and BOM export" and "Altium support beyond KiCad" in cloud plans, dunno if they are compelling.
It seems like this is just controlling KiCad. Assuming this produces a BOM as well, you could take the output files, send them to a board house like PCBWay or JLPCB and get the boards stuffed and shipped to you.
The board houses may have questions for you that may be difficult for you to answer, but theoretically you could answer those with AI and get fully assembled boards delivered right to your doorstep.
not quite. copperhead operates on its own hardware IR, compiles verified KiCad files and generates manufacturing outputs.
we're also building a design house around it to close the loop with fabs, handle DFM questions and eventually let you hit "order" and receive fully assembled boards!
Look at jlcpcb or other Chinese assembly houses. If you stay within their component library it is dead easy, just upload your gerber and BOM, and you can have assembled boards within a week or so. Slightly more difficult if they have to order parts for your BOM, but still not really that hard.
I did that with Codex+Sol alone, and made something even more complex in less time with Codex+Astra over the weekend.
Its maybe more hands on than you want it to be, but you mostly just need to supervise the work. But yes, the CAD outputs go directly to the JLCPCB ordering form, or whereever you fab
With AI enabled consumer hardware usecases going to explode this is something super relevant. At least 5 startups have pitched their wearables to me and they could definitely use this
Design for Manufacturability (DFM) will determine if they generate a viable product. Hardware is difficult, with a success rate around 1:66 for a startup.
It is a good idea to consult with a contract manufacturer engineering team early, and stop wasting peoples time including their own.
I have also seen people re-brand China pad-printed generic products, and claim they needed investor help buying a shipping container full of cheap stuff or outright e-waste. Careful, especially if you see multiple versions or the same product pop up at the same time. Best of luck =3
Will it though? Do you think people will actually be more creative with this or will we get yet another e-ink device with a slightly different form factor, or a "less than a phone" with different constraints?
In the end is the PCB design the bottleneck to create new devices or is it mostly about available components and their price?
The website is the marketing for the product, most people see that first, and they wont go further if your front door is festooned with goofball stuff.
Software moves so fast that its actually an anti feature. Libraries and SDKs measure lifetime support in years, but industrial hardware support *at minimum* is a decade. A lot of these new startups dont understand that established industry wont use them unless they known this shiny new system wont ve abandoned in a few years.
On the other hand, softwate devs trying to quickly make a product have something to get them going.
Some PM realized that agents will not push back against waterfall style project planning, so now we get an agent for all possible versions of waterfall projects.
fair critique but copperhead works as a feedback loop: design, verify, revise and repeat. closer to an engineering control loop than waterfall with an agent on top :)
When it gets to the end of the design loops, can it run simulations and tests, or is that out of scope i.e., for another product? (I didn't notice testing on a very quick peruse, but that doesn't mean I didn't simply miss it)
copperhead isn't just a wrapper around claude or gpt. it combines model intelligence with its own hardware IR, deterministic engines and continuous verification.
You joke but my coping saw cuts wood much faster than any of my normal saws. I don't know a lot about saws, I presume it's the type of blade on it. And I do indeed have three saws, which is a lot for someone who doesn't know much about saws. One that says it's good for cutting metal, one for wood and one for tight corners in wood (a coping saw).
Your coping saw probably has a pretty thin and narrow blade. That minimizes friction on the non cutting surface, and the amount of material removed because of the narrow blade.
Please don't post shallow dismissals or focus on trivialities. Let's focus on the substance of the project. It's a good sign that an early stage project hasn't devoted a lot of time or cost into their logo.
I'm sorry, but going on that website made me feel like I was being greeted by an AI support technician or recruiter.
I understand—these days, there are more reasons to vibe a landing page than not. To many, however, this page is going to be their first encounter with the project. While it sure is shallow to judge a book solely by its cover, in this case, the cover just blatantly screams "we haven't even tried"... Can you really blame people for not looking beyond it if even its own creator gave it a similar amount of attention? Especially in 2026, when everything preys on your attention and generating plausibly-looking low-effort projects has never been easier?
Many of the new agentic electronic design tools are KiCad-based, which is fine, but for people creating new EDA tools I'd encourage them to take a look at tscircuit (open-source, MIT). KiCad wasn't built for AI-gen with things like automatic routing/placement, supplier footprint orientation checking, connector orientation checking and other features that will be required as more people expect extensive validation for AI-generated designs. KiCad could add these things, but they've got decades of baggage and many Altium features to pull in. I'm worried that we're all getting bound by KiCad s-exprs
While this new competency of LLMs in EDA is objectively neat, I can't help but feel a little sad about the way this is going. Electronics projects are my refuge from the new hyper-speed low-quality software world. I want to "just not use it" and continue to enjoy electronics, but if I ever want to turn one of my ideas into a product, I'll be up against people who are building extremely quickly and to a lower quality standard. Yes, potential users of a cool new gadget care about having their problems solved above all else, but I can tell this is going to turn into another field we're all here saying "what happened to craft?" about, and idk, I just don't like it. And this is coming from someone who enjoys (turn by turn) LLM-boosted programming.
The space is definitely heating up.
Flux.ai being the incumbent Silixon based out of the UK have been showing demos Quilter and DeepPCB for layout The recent OpenAI demo...
I went the other way and pre-designed sub circuits with a set of rules that allows simple merge assembly, unfortunately I didn't have the time or budget to continue with it, but I took the constrained approach as with hardware, things can't be 99%.
The one thing I will say, is that my experience of hardware engineers is very gatekeepy.
Any questions about the use of AI for any form of automation on forums/Reddit get shot down instantly and the OP's told 'skill issue' more or less. In my opinion, just as with software, most work is simple and should be automated, there will always be a need for the real engineering when it comes to high specification work, high volume optimisation and hardware debug (although Claude code is pretty handy at driving a Jlink)
> The one thing I will say, is that my experience of hardware engineers is very gatekeepy.
Stay away from Reddit and forums if you want to see where the open minded people are looking. There are a lot of communities where EEs are experimenting with newer technologies and sharing their results, with realistic appraisals of what can be done.
You also need to understand the history of autorouting technology for PCBs. Autorouters with auto layout have been around in many forms for years. Their output never compares to a skilled EE doing it manually. The gap between autorouter output and skilled operator output is even bigger than the gap between a good developer and average AI codegen slop.
I’m interested in this space, but even the Fable/Astra or dedicated tools like Quilter, Flux, and others have a very, very long way to go for boards more complex than simple hobby boards.
I do think this is going to be good for hobby people doing simple PCBs though
NP-hard problems are still NP-hard even with magical LLM pixie sprinkles. =3
They're also NP-hard for the humans doing the majority of the work currently, meaning that good enough heuristics dominate as it is.
Every trace on a PCB is a traveling salesman problem with ballooning complexity.
https://en.wikipedia.org/wiki/Travelling_salesman_problem
While physics informed models do exist, they are still going to burn a lot of compute to generate failure modes people didn't know were possible. =3
https://www.youtube.com/watch?v=T4Upf_B9RLQ
Well, no, it's not.
If anything, it's closer to the bin packing problem. The cost function isn't expressed in terms of lowest cost between nodes, but instead fitting all of the traces with the lowest board layer count while still meeting stuff like EMI crosstalk guidelines. Then there'll be some traces that are very constrained (think DRAM or SERDES links) that have to be length matched, but those are pretty much invariably point to point links that already are heavily automated.
Traces being, say 20% longer than they need to be for an optimal solution doesn't really change the performance of the board in the vast majority of cases since they'll be some of the lowest resistance components of the netlist anyway, as well as the fact that the PCB is normally oversized for the number of traces needed as it fulfills structural/mechanical needs as well as the netlist needs.
And on top of that, because the optimal solution probably is NP-hard, once again, the industry doesn't look for optimal, only good enough. If layout techs in Altium were regularly solving NP-hard problems, computer science would be a different place. The only goal I see is to meet that bar without hiring layout techs.
>Traces being, say 20% longer than they need to be doesn't really change the performance of the board
Impedance matching requires you know what you are doing, and Altium will only take you so far. For the price, Altium/Protel has always been a poor deal for what you get software wise.
Even free Qspice (a more modern Analog Devices LTSpice) is a far better option:
https://www.qorvo.com/design-hub/calculators-simulation/qspi...
>the industry doesn't look for optimal, only good enough
Indeed, that is why your iPhone still weighs 3.7 kg. =3
> Impedance matching requires you know what you are doing, and Altium will only take you so far. For the price, Altium/Protel has always been a poor deal for what you get software wise.
Pretty much every high end board is designed under Altium. QSpice is a different tool for a different purpose.
And like I said, those few cases were the length actually matters tend to be heavily assisted with automation as it is.
> Indeed, that is why your iPhone still weighs 3.7 kg. =3
I guarantee you that an iPhone board isn't an optimal solution, simply good enough.
>I guarantee you that an iPhone board isn't an optimal solution,
DFM almost certainly guarantees an iPhone is both form, and cost optimized. Jobs was very clear early on in the product development that the EE work had to be miniaturized due to the energy density possible setting volumetric minimums on the battery technology at that time.
> simply good enough.
A common philosophy for people that make cost optimized low-end products. Some people love their 3.7kg phone, as it comes with a stylish shoulder strap. =3
Optimized != optimal
Optimal means there aren't any optimizations possible remaining.
Are you seriously going to suggest that there aren't any potential optimizations left in the iPhone's mainboard?
There are physical limits that are hit with any technology. =3
https://en.wikipedia.org/wiki/Sealioning
Magical LLM pixie sprinkles ... is that where magic smoke comes from?
Magic smoke is important, as it indicates a design parameter was exceeded.
I often recommend folks get a mini thermal camera for their phone... as inspecting for issues in electrical, hydraulic, or mechanical systems gets a fair bit easier/safer. =3
If the magic LLM pixie sprinkles can brute force their way to a solution using viable heuristics and their training data, I will use them.
NP-Hard is NP-hard... "heuristics" in this case is just a euphemism for a fantasy cost-function to scam shareholders.
It is a named problem, and can't be misappropriated like the $9Tn worth of FOSS code "AI" scraped and compacted for isomorphic plagiarism tokens. =3
So, then how are today's pcb layout techs solving these Np-hard problems in your mind, armed only with Altium?
Only decades of standards compliance, workmanship training, and experience. Human beings are very good at spotting patterns in noisy jungles, and making rational design tradeoffs.
Auto-routers have been around far longer than even smartphones. Somewhat functional in the trivial problem domains, and always useless where design choices mattered.
Best of luck solving a named problem. =3
> Only decades of standards compliance, workmanship training, and experience
If that could solve NP-hard problems, computer science would be a very different field.
Computationally what’s the difference between a human and an LLM besides scale and speed? Trained humans are still using heuristics and shortcuts. Just because these are subconscious and only possessed by talented, trained professionals doesn’t make the skill computationally special.
LLM do not think because they are not real "AI", but it does copy the linear patterns people exhibit if statistically salient within the granularity of the higher dimensional vector search space proximity. Watermarking does skew the compaction slightly, but not far from resulting output patterns. =3
https://en.wikipedia.org/wiki/The_Subservient_Chicken
I do think that slightly smarter LLMs and a good (although not perfect) autorouting algorithm could solve 99% of hobbyist's projects and simple industry boards, due to the repetition of those patterns in real life.
The LLM would learn the heiristics (example: data lines first, power lines later, etc.) and would request the autorouter to do that routing, then take the image output and request a different part (depth-first). If later no routing is posible with that configuration, after some retries it could try another way.
It wouldn't solve complex boards, and engineers are always needed for short comings (and even if not, for research), but I wouldn't say this is something different than poetry, music or pixel art, LLMs can imitate although most of the times in a uncanny way.
What were the chicken's thoughts on the Jacobian conjecture?
> Somewhat functional in the trivial problem domains, and always useless where design choices mattered.
This is laughable when you consider that semiconductor design is the least "trivial" problem domain, and it happens entirely in RTL. There's basically zero human intervention when it comes to layout: even floorplanning is being automated nowadays.
Simple: we aren't.
We can find local optima, but there's no real way to prove a given design is the best of all possible designs. We can only find designs which work and meet the given criteria.
One can prove that a design is correct, but it requires the same class of compute as an LLM to properly simulate. Circuit boards are hellishly complicated once you start simulating EM and RF responses.
As for how a good engineer does this, it's the same way pilots can fly helicopters: intuition. It's a skill built up from lots of reading the rules and theory, and lots of practice. One gets a feel for how the various fields and energies are moving.
Which, when you think about it, is just about how neural nets learn, isn't that neat?
I think the real answer here is that machine learning is absolutely capable of producing satisfactorily correct circuit boards. In principle. But I think the problem space is far too large for today's ML techniques and verification/iteration is just way too expensive. Maybe in another few years, I just don't think we have enough compute for it yet.
The best solution might be NP-hard. However we don't need the best, we need one that is good enough, and that is more doable.
> Stay away from Reddit and forums if you want to see where the open minded people are looking. There are a lot of communities where EEs are experimenting with newer technologies and sharing their results, with realistic appraisals of what can be done.
Where are these communities?
My experience with hardware engineers, at least IRL, is very different. They love to talk about their work. However, I used to be an EE so that probably helps.
As for Reddit, there's a lot of "bury head in sand and problem will go away" behavior when it comes to AI. People are understandably worried about their jobs, but they're certainly not doing themselves any favors by downplaying AI or looking for "tech niches where AI isn't yet."
Copperhead is very interesting. I do some embedded systems consulting on the side, but I've never enjoyed PCB layout very much. I briefly investigated using AI for it the last time I had to do a board, but it wasn't very helpful.
I really want to like this but the AI written copy is painful. "The problem, and who hurts". Me that's who, come on guys.
Has anyone had experience with Copperhead vs Astra and kicad? Looking for a similar tool soon
we're developing https://copperbench.org - an open-source benchmark for evaluating ai agents on real, verifiable hardware design tasks.
any idea how it stacks up against zoo / zookeeper?
https://zoo.dev/research/zookeeper
mmm, someone decided to reuse `zookeeper` name, seriously?
This is what I want to know as well. I'm about to kick off a project or two.
Copperhead directly edits the KiCad files so that is the CLI version of that Astra demo.
not quite. copperhead operates on its own IR, which then compiles to KiCad files.
I do not have experience with Copperhead, but I made 2 PCBs with Claude. He made a py script that generates Kicad sources, I ended up generating all files (in particular schematics and PCB) from a shared netlist, and use Kicad cli to validate and generate gerbers.
I manufactured both PCBs via PCBWay (Claude also red all the specs and configured the constraints accordingly) and both work. I'm pretty impressed, especially because I've never done a PCB myself and didn't know I could.
What I was doing manually, co-working with Claude, was placing and routing (I was doing those via Kicad, then saving, then Claude was re-importing my work in his py files).
I recommend having the LLM write Skidl, which generates a netlist, which you import in the PCB editor, which the LLM then reviews. Routing itself I think would require code-driven routing (expressing board via layout constraints, kinda like UI constraints/CSS) which does not exist yet.
Just regular coding agents are really good with Skidl schematics and can review layouts well. I'm not sure why you'd want a specialised environment for this.
Is copperhead related to this Copperbrain project?
https://github.com/deadbringer17/Copperbrain
They have similar names, seem to solve similar problems and both have first commit within a few days in July. One is Python and the other Typescript though and they don't seem to be forks.
ChatGPT based naming
This is probably not the primary way people use the tool, but if I log in (desktop, Chrome on macOS), click "Start a board" on the sidebar, and go to click any of the inputs, I can't type text in them (the inputs are "Start from an example", "What are you building", and "The brief".
If you scroll down they want you to "Connect copperhead to GitHub first." The bottom should have a page where you can give them access to a repo for handling stuff.
Why would somebody ever use a hosted version? I see "One-click gerber, DXF/STEP, render and BOM export" and "Altium support beyond KiCad" in cloud plans, dunno if they are compelling.
Can I take the output of this and get a fully assembled board mailed to me? Thats my dream...
soon :)
It seems like this is just controlling KiCad. Assuming this produces a BOM as well, you could take the output files, send them to a board house like PCBWay or JLPCB and get the boards stuffed and shipped to you.
The board houses may have questions for you that may be difficult for you to answer, but theoretically you could answer those with AI and get fully assembled boards delivered right to your doorstep.
not quite. copperhead operates on its own hardware IR, compiles verified KiCad files and generates manufacturing outputs.
we're also building a design house around it to close the loop with fabs, handle DFM questions and eventually let you hit "order" and receive fully assembled boards!
Pretty much with the JLC plugin to KiCad.
Yes.
Look at jlcpcb or other Chinese assembly houses. If you stay within their component library it is dead easy, just upload your gerber and BOM, and you can have assembled boards within a week or so. Slightly more difficult if they have to order parts for your BOM, but still not really that hard.
I did that with Codex+Sol alone, and made something even more complex in less time with Codex+Astra over the weekend.
Its maybe more hands on than you want it to be, but you mostly just need to supervise the work. But yes, the CAD outputs go directly to the JLCPCB ordering form, or whereever you fab
"hardware as fast as software". Please no, lol.
I've imagined a chip running as slow as python.
I’ve read it the same way. Definitely a double edged slogan.
LM555 or 300MB nodejs App on a $300 SoC... the choice is clear... lol =3
haha nice catch but this is about development speed
maybe something like "make hardware as quickly as software" would be clearer
Or worse: hardware as slow as any average, bloated Electron "app".
I've imagined bugs releasing magic smoke faster than usual.
With AI enabled consumer hardware usecases going to explode this is something super relevant. At least 5 startups have pitched their wearables to me and they could definitely use this
Design for Manufacturability (DFM) will determine if they generate a viable product. Hardware is difficult, with a success rate around 1:66 for a startup.
It is a good idea to consult with a contract manufacturer engineering team early, and stop wasting peoples time including their own.
I have also seen people re-brand China pad-printed generic products, and claim they needed investor help buying a shipping container full of cheap stuff or outright e-waste. Careful, especially if you see multiple versions or the same product pop up at the same time. Best of luck =3
Will it though? Do you think people will actually be more creative with this or will we get yet another e-ink device with a slightly different form factor, or a "less than a phone" with different constraints?
In the end is the PCB design the bottleneck to create new devices or is it mostly about available components and their price?
Might be a better website if it wasn't all clearly AI-copy.
"Nothing commits without its gate."
the website isn't the product. try copperhead and judge the engineering :)
The website is the marketing for the product, most people see that first, and they wont go further if your front door is festooned with goofball stuff.
fixed it!
Interested in the evaluations of anyone actually using this.
I tested over the weekend and Astra can
- create and modify schematics from instructions - place components and route traces
out of the box, just via normal 'computer use'. I'm not satisfied with the routing but it isn't terrible.
it would propably help thousands of ppl ngl
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when LLM calls are the bottleneck, the programming language stops mattering.
Same.
Software moves so fast that its actually an anti feature. Libraries and SDKs measure lifetime support in years, but industrial hardware support *at minimum* is a decade. A lot of these new startups dont understand that established industry wont use them unless they known this shiny new system wont ve abandoned in a few years.
On the other hand, softwate devs trying to quickly make a product have something to get them going.
Let me know when I can build my own Cerebras chips, because we're never going to see them as consumers, otherwise.
Yes yes, I know, leagues apart. Still though... One can dream.
https://github.com/i2cjak/T3CAD seems like another promising project
I used claude and gemini to edit/debug kicad schematics. And it was pretty good. What is the point of this agent?
Some PM realized that agents will not push back against waterfall style project planning, so now we get an agent for all possible versions of waterfall projects.
fair critique but copperhead works as a feedback loop: design, verify, revise and repeat. closer to an engineering control loop than waterfall with an agent on top :)
When it gets to the end of the design loops, can it run simulations and tests, or is that out of scope i.e., for another product? (I didn't notice testing on a very quick peruse, but that doesn't mean I didn't simply miss it)
we are building tool plane integrations around the same. stay tuned!
Is it doing any circuit simulation or anything?
we are building tool plane integrations around the same. stay tuned!
copperhead isn't just a wrapper around claude or gpt. it combines model intelligence with its own hardware IR, deterministic engines and continuous verification.
User just couldn't care less.
Do it have extra feature? Speed? Ease of use?
we have the wrapper orchestrator + additional specialized tools. so yeah we are better than just wrappers.
I use a jigsaw to cut wood. It works pretty good. What’s the point of a table saw?
You joke but my coping saw cuts wood much faster than any of my normal saws. I don't know a lot about saws, I presume it's the type of blade on it. And I do indeed have three saws, which is a lot for someone who doesn't know much about saws. One that says it's good for cutting metal, one for wood and one for tight corners in wood (a coping saw).
wait are you the mitxela from youtube fluid simulation pendant video
Your coping saw probably has a pretty thin and narrow blade. That minimizes friction on the non cutting surface, and the amount of material removed because of the narrow blade.
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Please don't post shallow dismissals or focus on trivialities. Let's focus on the substance of the project. It's a good sign that an early stage project hasn't devoted a lot of time or cost into their logo.
I'm sorry, but going on that website made me feel like I was being greeted by an AI support technician or recruiter.
I understand—these days, there are more reasons to vibe a landing page than not. To many, however, this page is going to be their first encounter with the project. While it sure is shallow to judge a book solely by its cover, in this case, the cover just blatantly screams "we haven't even tried"... Can you really blame people for not looking beyond it if even its own creator gave it a similar amount of attention? Especially in 2026, when everything preys on your attention and generating plausibly-looking low-effort projects has never been easier?